Timing Analysis - Part 3

The following are the commonly used terms in Timing Analysis.

Clock Signal:

• A signal used to synchronize the operations of an electronic system. Clock pulses are continuous, precisely spaced changes in voltage.

• The circuit in a digital computer that provides a common reference train of electronic pulses for all other circuits

Pulse Width:

• It is the time between the active and inactive states of the same signal. The register may not latch the data correctly if clocked with a smaller pulse.
  

Setup Time and Hold Time:

• The Setup Time is the time interval before the active clock edge during which the data should remain unchanged.

• The Hold Time is the time interval after the active clock edge during which the data should remain unchanged..
  

Recovery Time and Removal Time :

• It is the time available between the asynchronous signal going inactive to the active clock edge. ( Like setup time for asynchronous port [set, reset] ).

• It is the time available between active clock edge and asynchronous signal going inactive. (Like Hold time for asynchronous port [set, reset] ).

Clock Skew:

• The maximum difference in arrival time of the clock signal to each register in the design.

Input Arrival Time:

• An arrival time defines the time interval during which a data signal arrive at an input ports/pin.

Output Required Time:

• An required time defines the data required time on output ports/pins.

Slack:

• It is the difference between the required time and the arrival time.

• Negative slack indicates that constraints have not been met, while positive slack indicates that constraints have been met.

• Slack analysis is used to identify the timing critical paths in a design.

Critical Path:

• Any logical path in the design that violates the timing constraints/path with a negative slack.

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